Device Models
Subject ELEN90043 (2015)
Note: This is an archived Handbook entry from 2015.
Credit Points: | 12.5 | ||||||||||||
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Level: | 9 (Graduate/Postgraduate) | ||||||||||||
Dates & Locations: | This subject has the following teaching availabilities in 2015: Semester 1, Parkville - Taught on campus.
Timetable can be viewed here. For information about these dates, click here. | ||||||||||||
Time Commitment: | Contact Hours: 1 two hour lecture per week Total Time Commitment: 200 hours | ||||||||||||
Prerequisites: |
Admission into the MC-NE Master of Nanoelectronic Engineering OR Admission into a postgraduate course offered by the Melbourne School of Engineering, subject to program coordinator approval | ||||||||||||
Corequisites: | None | ||||||||||||
Recommended Background Knowledge: | Basic knowledge and understanding of electronics | ||||||||||||
Non Allowed Subjects: | None | ||||||||||||
Core Participation Requirements: |
For the purposes of considering request for Reasonable Adjustments under the Disability Standards for Education (Cwth 2005), and Students Experiencing Academic Disadvantage Policy, academic requirements for this subject are articulated in the Subject Description, Subject Objectives, Generic Skills and Assessment Requirements of this entry. The University is dedicated to provide support to those with special requirements. Further details on the disability support scheme can be found at the Disability Liaison Unit website: http://www.services.unimelb.edu.au/disability/ |
Subject Overview: |
AIMS This subject introduces students to the fundamental principles of conventional and advanced transistor and nanodevice modelling. This subject discusses different transport mechanisms in micro and nano-metre scale devices. Devices include conventional transistors (NMOS, PMOS), double gate transistors, FinFET and Varactors and other active devices are the building blocks of microelectronic and nanoelectronic. This subject will provide the student with the latest models of these devices operating in the multi-gigahertz and sub-threshold regions. Students will be able to design and analyse simple circuits using these models. INDICATIVE CONTENT Topics include:
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Learning Outcomes: |
INTENDED LEARNING OUTCOMES (ILO) The goal of the course is to teach the future designers the principles of operation, design and construction of contemporary semiconductor devices created on the basis of solid state physical effects. Having completed this subject it is expected that the student be able to:
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Assessment: |
All Intended Learning Outcomes (ILOs) are assessed in the final written examination and submitted design project reports. |
Prescribed Texts: | None |
Breadth Options: | This subject is not available as a breadth subject. |
Fees Information: | Subject EFTSL, Level, Discipline & Census Date |
Generic Skills: |
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Notes: |
LEARNING AND TEACHING METHODS The subject is delivered through lectures. INDICATIVE KEY LEARNING RESOURCES Students are provided with lecture slides and a problem set and solutions and reference text list. CAREERS / INDUSTRY LINKS Exposure to microelectronic industry through research lab visits and/or guest lectures. |
Related Course(s): |
Master of Nanoelectronic Engineering |
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