Note: This is an archived Handbook entry from 2009. Search for this in the current handbook
|Dates & Locations:|| |
This subject has the following teaching availabilities in 2009:Semester 2, - Taught on campus.
Timetable can be viewed here. For information about these dates, click here.
|Time Commitment:||Contact Hours: Twenty-four hours of lectures, 12 hours of tutorials and 12 hours of laboratory and project work |
Total Time Commitment: Not available
431-328 Digital Systems 3: Circuits and Systems
|Recommended Background Knowledge:||None|
|Non Allowed Subjects:||None|
|Core Participation Requirements:||
For the purposes of considering request for Reasonable Adjustments under the Disability Standards for Education (Cwth 2005), and Student Support and Engagement Policy, academic requirements for this subject are articulated in the Subject Overview, Learning Outcomes, Assessment and Generic Skills sections of this entry.
It is University policy to take all reasonable steps to minimise the impact of disability upon academic study, and reasonable adjustments will be made to enhance a student's participation in the University's programs. Students who feel their disability may impact on meeting the requirements of this subject are encouraged to discuss this matter with a Faculty Student Adviser and Student Equity and Disability Support: http://services.unimelb.edu.au/disability
CoordinatorAssoc Prof William Shieh
On completion of this subject, students should have an understanding of some advanced topics in digital system design, taken from the following.
Timing in digital systems - clock distribution, including sources and management of skew; metastability and synchronisation; the effect of loading; synchronous and asynchronous bit level transport, including line coding, scrambling, clock recovery, timing requirements, jitter (sources and effect), jitter filtering and bit stuffing.
Noise in digital systems - signal referencing; grounding; crosstalk; simultaneous switching; power supply distributions and related issues including impedance of parallel planes, loss and damping, impedance control over frequency, decoupling and interaction of lumped and distributed impedances.
Interfacing to the analogue world - sample and hold circuits; techniques for converting between analogue and digital representations of signal; noise analysis and quantisation effects.
On completion of this subject the student should be able to:
1. Explain, assess and apply timing analysis and design techniques to the end of achieving reliable and repeatable operation of digital systems in the face of the limitations imposed by realisation technologies;
2. Explain, assess and apply techniques for managing sources of noise in electronic realisations of digital systems;
3. Model and assess the performance of techniques for digital sampling of analogue signals.
One 3-hour end-of-semester written examination (70%); mid-semester test and/or project report not exceeding 20 pages including appendices, diagrams, tables, graphs and computer output (30%). The relative weighting of test and/or project report will be specified both in the first lecture and on the subject web page at the start of semester.
|Recommended Texts:|| |
Information Not Available
|Breadth Options:|| |
This subject is not available as a breadth subject.
|Fees Information:||Subject EFTSL, Level, Discipline & Census Date|
Bachelor of Engineering (Computer Engineering) |
Bachelor of Engineering (Computer) and Bachelor of Arts
Bachelor of Engineering (Computer) and Bachelor of Commerce
Bachelor of Engineering (Computer) and Bachelor of Laws
Bachelor of Engineering (Electrical Engineering)
Bachelor of Engineering (EngineeringManagement) Computer
Bachelor of Engineering (Mechatronics) and Bachelor of Computer Science
Bachelor of Engineering (Software Engineering)
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